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Van Cang, Luc P.; |
Variable-passband variable-phase digital filter

A variable-passband, variable-phase digital filter in which Q digital samples of a signal are entered through (Q-1) delay lines, to be delayed into q two-bit adjacent doublets. Weighting tables in read only memories are addressed by each doublet. Each weighting table includes the results of linear combinations of the weights of doublets composed of bits of the same order multiplied by multiplier coefficients which are smaller than unity. Each integral portion of a result found in a table is applied at the same time as the fractional portions of the other results provided by the other tables to the addressing inputs of a programmed memory containing binary words. Binary words are addressed in the prorammed memory by the integral and fractional portions of the results found in the weighting tables. Each binary word has a value equal to the linear combination of the corresponding values of the samples of the signal by the multiplier coefficients.


What is claimed is:
1. A variable-passband variable-phase digital filter of the type in which Q digital samples of a signal to be filtered, which are coded on 2.times.q bits, are applied successively to (Q-1) delay lines connected in series, and in which the values of the delayed samples are weighted by Q multiplier coefficients which are smaller than unity and are collected at outputs of each delay line, and are combined, to form a series of samples representing the filtered digital signal, comprising:
means for subdividing said sample to be filtered and each delayed sample into q adjacent, weighted two-bit doublets;
first storage means, coupled to said subdividing means to be addressed by each doublet, for storing weighting tables, each said weighting table results of linear combinations of weights of doublets composed of bits of the same rank multiplied by said multiplier coefficients, and producing at the same time an integral portion of said results in said weighting tables and fractional portions thereof;
second storage means having a plurality of addressing inputs receiving at the same time the integral and fractional portions thereof, and for ensuring that each binary number addressed in the second storage means by said integral and fractional portions of the results from said first storage means as a function of the values of the Q samples of the signal to be fiItered, has a value equal to a linear combination of corresponding values of the Q samples of the signal by the Q multiplier coefficients.
2. A filter as in claim 1 further comprising a plurality of filters, connected in cascade.
3. A filter as in claim 1, further comprising adding circuits and a plurality of filters, wherein the outputs of said plurality of filters are connected to each other via said adding circuits.
4. A filter according to claim 1, wherein said first and second storage means include read only memories.
5. A digital filter, comprising:
means for delaying an input signal to produce delayed input signals;
means for subdividing said input signal and said delayed input signals into subsignals which are weighted by magnitude;
first storage means, having input address receiving structures coupled to said subsignals, for storing linear combinations of values of said subsignals, weighted by respective weighting factors and producing output signals indicative thereof, output signals indicative of at least a highest weight one of said subsignals having an integral portion and a fractional portion;
second storage means, having input address receiving structures coupled to said output signals of said first storage means, for storing values indicative of linear combinations of said output signals from said first storage means and for producing output signals indicative of said values, said output signals being indicative of filtered signals.
6. An filter as in claim 5, wherein said first and second storage means each include read only memories.
7. An filter as in claim 5, wherein said second storage means includes carry outputs.
8. An filter as in claim 5, wherein said subsignals are doublets.
9. An filter as in claim 8, wherein there are two delayed input signals, E.sub.1 and E.sub.2, which can be expressed as: ##EQU4## with E.sub.3 being the delayed signal, and said subdividing means includes means for subdividing into doublets according to the relations: ##EQU5##
10. A method of digital filtering, comprising the steps of:
delaying an input signal to produce delayed input signals;
subdividing said input signal and said delayed input signals into subsignals which are weighted by magnitude;
storing in advance linear combinations of values as weighted by respective weighting factors of each of said subsignals in a first storage means;
addressing said first storage means using said subsignals, to receive output signals indicative of said values, said output signals of said first storage means from at least a highest weighted subsignal having an integral portion and a fractional portion;
storing in advance values indicative of linear combinations of output signals from said first storage means;
using said output signals from said first storage means to address said second storage means; and
using output signals from said second storage means as filterd signals.
11. A method as in claim 10, wherein there are two delayed input signals, E.sub.1 and E.sub.2, which can be exprressed as: ##EQU6## with E.sub.3 being the delayed signal, and said subdividing means includes means for subdividing into doublets according to the relations: ##EQU7##
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