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Kanamoto, Yoshitaka; Ishiodori, Makoto; |
Signal reproducing circuit

An improved high boost circuit for a reproduced frequency modulated video signal is disclosed, wherein the third harmonic components of the reproduced f.m. video signal is suppressed, so that the undesired so-called over-modulating effect causing signal inversion is avoided at the boundary of different video signal levels.


We claim as our invention:
1. Signal reproducing circuit for an angular modulated signal, comprising:
(a) a delay means for receiving and delaying an incoming angular modulated signal by predetermined times .tau., and 2.tau.;
(b) a mixing means for mixing said incoming angular modulated signal and said 2.tau.-delayed angular modulated signal;
(c) a signal limiter means receiving the output of said mixing means and limiting the amplitude of signals derived from said mixing means; and
(d) an adding means receiving the outputs of said delay means and said signal limiter means and adding in said opposite polarity the signals from said signal limiter means and .tau.-delayed angular modulated signal, whereby an equalized angular modulated signal is derived from said adding means.
2. Signal reproducing circuit as claimed in claim 1, wherein said delay means includes a delay line which delays said angular modulated signal and produces a .tau.-delayed angular modulated signal at its output and a 2.tau.-delayed angular modulated signal at its input.
3. Signal reproducing circuit as claimed in claim 2, wherein said mixing means is an input circuit of said delay line, and an output line for said mixing means being derived from said input circuit of said delay line.
4. Signal reproducing circuit as claimed in claim 3, wherein said output line is connected to said adding means by way of said signal limiter means.
5. Signal reproducing circuit as claimed in claim 2, wherein said adding means includes a differential amplifier having a pair of input terminals, one of said input terminals being connected to said output of the delay line and the other of said input terminals being connected to said input of said delay line by way of said signal limiter means.
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