Phase shift demodulator

A quadrature demodulator for a phase shifted input pulse signal. The demodulator produces a four state digital code word on two output lines dependent upon the phase of the input signal. The input signal may have a phase shift, from the phase of the carrier signal, of zero degrees, +90.degree., -90.degree., or 180.degree.. The demodulator includes a clock-driven counter having an output signal at a fundamental frequency substantially identical to the carrier frequency of the input pulse signal. The counter produces additional output signals at frequencies which are multiples of the carrier frequency. The counter is synchronized with the input signal during a reference interval of zero phase shift, and a strobe circuit combines the various counter outputs to produce strobe signals to detect the phase shifted input signal. The strobe signals are used to clock a pair of flip-flops which each receive the input signal at a data input, with the Q outputs of the flip-flops providing the pair of output lines which indicate the four states of the digital code word.

WHAT IS CLAIMED IS:

1. A phase shift demodulator for demodulating an input pulse signal comprising pulses occurring at a given frequency, phase shift modulated with sequences of digital code words, comprising:

a clock-driven counter having a plurality of pulse signal outputs of differing frequencies, one of which corresponds substantially to said given frequency of the modulated input pulse signal;

means for synchronizing the pulse signal outputs of the counter with the unmodulated phase of the input pulse signal at the beginning of a sequence of digital code words which modulate said given frequency of the input pulse signal;

strobe means, coupled to said plurality of counter outputs, for combining said plurality of counter outputs to produce a strobe signal output, differing from each counter output of said plurality of counter outputs, including a strobe signal for each word in a sequence of digital code words modulating said given frequency of the input pulse signal; and

output means, coupled to the strobe signal output and to the input pulse signal, for producing sequences of demodulated digital code words based upon the condition of the input pulse signal when each said strobe signal is produced.

2. The demodulator of claim 1 in which the counter includes a reset input and is responsive to a reset signal at the reset input to inhibit the counter pulse signal outputs, and in which the means for synchronizing further includes means for (a) coupling a reset signal to said reset input of the counter prior to the beginning of a sequence of digital code words in the input pulse signal and for (b) subsequently removing the reset signal from said reset input of the counter before the beginning of the sequence of digital code in the input pulse signal, when the input pulse signal is at a particular phase.

3. The demodulator of claim 2 in which the means for synchronizing further includes means, coupled to the input pulse signal and responsive thereto, for producing a sync pulse at a sync pulse output before the beginning of a sequence of digital code words in the input pulse signal, and in which the means for coupling and removing the counter reset pulse comprises a flip-flop having a clock input coupled to the input pulse signal, a data input coupled to said sync pulse output, and a Q output for providing the reset signal.

4. The demodulator of claim 1 in which the output means comprises a first flip-flop having a data input coupled to the input pulse signal, a clock input coupled to the strobe signal produced by the strobe means, and a Q output.

5. The demodulator of claim 4 in which the output means further comprises a second flip-flop having a data input coupled to the input pulse signal and a clock input coupled to the strobe signal of the strobe means, and having a Q output, the conditions of the Q outputs of the output means flip-flops defining sequences of digital code words produced by the output means.

6. The demodulator of claim 5 in which the output means further includes an inverter coupled between the strobe signal produced by the strobe means and the clock input of the second flip-flop in the output means.

7. The demodulator of claim 1 in which the plurality of pulse signal outputs of the counter include a first output at the carrier frequency, a second output at double the carrier frequency, and a third output at four times the carrier frequency.

8. The demodulator of claim 7 in which the strobe means further comprises a flip-flop, an inverter, and an AND gate, the flip-flop having a clock input coupled to the third counter output, a data input coupled through said inverter to the second counter output, and a Q output, the AND gate having a first input coupled to the Q output of said flip-flop, a second input coupled to the first counter output and having an output at which is produced said strobe signal.

9. A phase shift demodulator for demodulating an input pulse signal comprising pulses occurring at a given frequency, phase shift modulated with separated sequences of digital code words, comprising:

a clock-driven counter having a plurality of pulse signal outputs of differing frequencies, one of which corresponds substantially to said given frequency of the pulses of said input pulse signal;

means for synchronizing the pulse signal outputs of the counter with an unmodulated phase of the input pulse signal only at the beginning of each sequence of digital code words which modulate said given frequency of the pulses of said input pulse signal;

strobe means, coupled to said plurality of counter outputs, for producing a strobe signal for each word in each sequence of digital code words which modulate said given frequency of the pulses of said input pulse signal; and

output means, coupled to the strobe signal and to the input pulse signal for producing sequences of demodulated digital code words based upon the condition of the input pulse signal when each said strobe is produced.