Memory access optimizing method

The present invention provides a memory access optimizing method which judges an access method suitable for each of memory accesses and executes the preload optimization and prefetch optimization, according to the judgement result, for an architecture equipped with a prefetch mechanism to write the data on a main storage device into a cache memory and a preload mechanism to write the data on the main storage device into a register without writing it into the cache memory. The memory access method judging step analyzes whether or not there is a designation of a memory access method by a user. Moreover, the memory access method judging step investigates whether or not the data are already in a cache memory, whether or not the data compete with other data for a cache, whether or not the data are to be referred to again later, and whether or not the data fulfill the restriction on register resources.

What is claimed is:

1. For use in an architecture including a prefetch mechanism for writing data on a main storage device to a cache memory, and a preload mechanism for not writing the data on said main storage device to said cache memory, but loading directly the data into a register, a memory access optimizing method of outputting a code utilizing both of said prefetch mechanism and said preload mechanism, said method comprising:

an access method judgement step of judging which of load for writing directly data from said cache memory to said register, prefetch for loading the data from said cache memory after having written the data to

said cache memory, or preload is applied to the associated one of memory accesses on a program;

a step of generating a preload code for a reference which has been judged to be the preload in said access method judgement step; and

a step of generating a prefetch code for a reference which has been judged to be the prefetch in said access method judgement step,

said access method judgement step having:

a step of analyzing the designation of an access method in said program,

wherein for the reference which has been designated as either the prefetch or the preload by the analysis, an access method is judged in accordance with said designation.

2. A memory access optimizing method according to claim 1, wherein the designation of said access method is carried out in loop unit within a program source or a compiler command line, and also is carried out with an array name, or an array element to be prefetched or preloaded.

3. For use in an architecture including a prefetch mechanism for writing data on a main storage device to a cache memory, and a preload mechanism for not writing the data on said main storage device to said cache memory, but loading directly the data into a register, a memory access optimizing method of outputting a code utilizing both of said prefetch mechanism and said preload mechanism, said method comprising:

an access method judgement step of judging which of load, prefetch or preload should be applied to the associated one of memory accesses on a program;

a step of generating a preload code for a reference which has been judged to be preloaded in said access method judgement step; and

a step of generating a prefetch code for a reference which has been judged to be the prefetch in said access method judgement step,

wherein said access method judgement step is to carry out the judgement based on the situation of utilization of cache memory or register resources.

4. A memory access optimizing method according to claim 3, wherein said access method judgement step includes:

a step of judging a stride indicating a reference distance of the memory access between successive iterations in number of elements; and

a step of determining a reference stride value as the reference for a stride value for judging an access method,

wherein the prefetch is selected for the reference in which the stride is equal to or smaller than the reference stride value, while the preload is selected for other references in order to carry out the judgement.

5. A memory access optimizing method according to claim 4, wherein said step of determining a reference stride value performs the determination on the basis of data size which is written to the cache memory through one time of prefetch, and data size to which one time of memory access refers.

6. A memory access optimizing method according to claim 3, wherein said access method judgement step has a step of analyzing a re-reference made to the same cache line between the memory accesses;

if a re-reference is present to the data which is to be executed previously, the load is selected;

if a re-reference is present to the data which is to be executed later, the prefetch is selected; and

if a re-reference is not present, the preload is selected in order to carry out the judgement.

7. A memory access optimizing method according to claim 3, wherein said access method judgement step has a step of analyzing cache competition between the memory accesses; and

for the data which competes with other data for cache when the prefetch is selected as the access method, the preload is selected in order to carry out the judgement.

8. A memory access optimizing method according to claim 3, wherein said access method judgement step has a step of judging the situation of occupation of the register for the memory access in the loop when the preload is selected as the access method; and

when the situation of occupation of the register fulfills predetermined conditions, the prefetch is selected to carry out the judgement.

9. A memory access optimizing method according to claim 6, wherein said step of analyzing a re-reference made to the same cache line between the memory accesses includes:

a step of analyzing a re-reference between the references which belong to the same loop; and

a step of analyzing a re-reference between the references between the difference loops,

said step of analyzing a re-reference between the references between the difference loops further includes:

a step of analyzing the sum of the reference ranges of the memory access for which either the prefetch or the load within the loop to be executed previously is selected; and

a step of analyzing the sum of the reference ranges of the memory access within the loop to be executed later.